A historian analyzing early computer blueprints finds that the ENIAC used 20 decimal digits of memory per register and had 10 registers. Later, a STOR-MATAC system improved this to 16 binary registers (2 bytes each) for the same effective capacity. How many total bytes does the ENIAC register memory occupy compared to the improved system? - Parker Core Knowledge

Understanding the Context

During the 1940s, the ENIAC (Electronic Numerical Integrator and Computer) pioneered electronic computation with a radical architecture for its time. As detailed by historians reviewing original blueprints, ENIAC used 20 decimal digits (decits) per register. Each register stored a full decimal value, with no binary conversion involved in raw memory access.

ENIAC featured 10 dedicated registers, each capable of holding one 20-digit value. While decimal representation offers intuitive clarity for human users, it required more complex circuitry compared to binary systems. Since each register used 20 decimal digits, and assuming each decimal digit (0–9) required at least one memory unit (e.g., a 4-bit byte), we estimate each register occupied approximately 20 bytes (though actual implementation could vary, the 20 decimal digits define a clear 20-unit memory cell analogy).

Thus, total ENIAC register memory =
10 registers × 20 decimals per register = 200 decimal digit units
Interpreted as a rough memory capacity, and if we conservatively equate 20 decimals to ~20 bytes (for simplicity), the total ENIAC register memory occupies:
👉 ~4,000 bytes (if each decimal digit corresponds to 2 bits; in early systems, memory was tightly packed, but modern analysis suggests 20 digits ≈ 20 bytes equivalent).

The STOR-MATAC Evolution: Binary Registers for Efficiency

Key Insights

By the 1960s, advancements in binary logic and memory architecture led to systems like the STOR-MATAC, which optimized memory efficiency. Unlike ENIAC’s decimal-digit registers, STOR-MATAC employed 16-bit binary registers, where each register used 2 bytes (16 bits). Crucially, the effective storage capacity matched ENIAC’s 200 decimals, but in compact binary form.

Since STOR-MATAC uses 16-bit (2-byte) registers and achieves the same computational throughput, its total register memory size for equivalent capacity is:

200 decimals × 2 bytes (per register) → But note: STOR-MATAC stores multibit data efficiently; however, the register count and effective memory size must match.

With 10 register banks and 2 bytes per binary register:
👉 Total STOR-MATAC register memory = 10 × 2 = 20 bytes

Wait — this seems inconsistent. But historically, while early systems used decimal digits per register, modern interpretation aligns effective memory. Re-evaluating carefully:

Final Thoughts

If ENIAC’s 10 registers × 20 decimal digits = 200 digit slots, and STOR-MATAC stores 200 total binary bytes with each 16-bit register, the system maintains equivalent effective storage using binary, denser encoding.

Thus, despite the binary shift, STOR-MATAC uses only 20 bytes total — a staggering efficiency gain.

Total Memory Comparison

| System | Registers | Decimal Digits per Reg | Bytes per Register | Total Register Memory (decimal-equivalent) | Total Register Memory (binary) |
|--------------|-----------|------------------------|--------------------|-------------------------------------------|-------------------------------|
| ENIAC | 10 | 20 digits | ~20 bytes | 200 digits ≈ 4,000 bytes | 200 × 2 = 400 bytes ≈ 1,600 bytes (if 2 bytes/decimal) |
| But historically: Each decimal digit ≈ 1 byte → ENIAC ≈ 4,000 bytes
| STOR-MATAC | 10 | 20 digits | 2 bytes each | 10 × 2 = 20 bytes (compressed binary) | 200 digits × 2 = 400 bytes |

However, to reconcile standard interpretations from historian blueprints—where decimal digit memory is tracked as decimal places, not bytes—modern analysis shows:

ENIAC register memory ≈ 4,000 bytes (10 × 400)
STOR-MATAC register memory = 10 × 2 = 20 bytes